Registration to be prima facie evidence of validity
Section 19 of the Semiconductor Integrated Circuits Layout-Design Act, 2000 deals with registration to be prima facie evidence of validity. In all legal proceedings relating to a layout-design registered under this Act (including application under section 30), the original registration of the layout-design and all subsequent assignments and transmissions of layout-design shall be prima facie evidence of the validity thereof. The Act came into force on 01 May 2004.
(1) In all legal proceedings relating to a layout-design registered under this Act (including application under section 30), the original registration of the layout-design and all subsequent assignments and transmissions of layout-design shall be prima facie evidence of the validity thereof.
(2) In all legal proceedings as aforesaid, a registered layout-design shall not be held to be invalid on the ground that it was not a registerable layout-design under section 7 except upon evidence of originality and that such evidence was not submitted to the Registrar before registration.
Section 19, The Semiconductor Integrated Circuits Layout-Design Act, 2000 (Act 37 of 2000).
Cross-references
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Questions about Section 19
What does Section 19 of the Semiconductor Integrated Circuits Layout-Design Act deal with?
Section 19 of the Semiconductor Integrated Circuits Layout-Design Act is headed "Registration to be prima facie evidence of validity". In all legal proceedings relating to a layout-design registered under this Act (including application under section 30), the original registration of the layout-design and all subsequent assignments and transmissions of layout-design shall be prima facie evidence of the validity thereof.
How do I find court cases under Section 19 of the Semiconductor Integrated Circuits Layout-Design Act?
In judgments and charge sheets this section is written several ways, and each form finds a different set of orders. These search the full text of every order eCourtsIndia holds, best matches first: Semiconductor Integrated Circuits Layout-Design Act 19, section 19 Semiconductor Integrated Circuits Layout-Design Act, section 19 of the Semiconductor Integrated Circuits Layout-Design Act. Each opens the full list of orders on eCourtsIndia, where it can be narrowed by court, year and outcome.
What should I read with Section 19 of the Semiconductor Integrated Circuits Layout-Design Act, and has it changed?
Its own text turns on section 7 (Prohibition of registration of certain layout-designs), section 30 (Power to rectify the register), so none of them can safely be read on its own.
When did Section 19 of the Semiconductor Integrated Circuits Layout-Design Act come into force?
Section 19 of the Semiconductor Integrated Circuits Layout-Design Act, cited as Semiconductor Integrated Circuits Layout-Design Act 19, came into force on 01 May 2004, having been enacted on 04 Sep 2000. It is in force as at the date shown on this page.
Other sections of this Act
Source and method. Compiled from the enactments of Parliament and of the State legislatures as published on India Code, and republished together with commentary and other original matter under section 52(1)(q)(ii) of the Copyright Act, 1957. Structured, cross-referenced and maintained by eCourtsIndia. Text as in force on 17 Oct 2026. This page is not a substitute for legal advice.